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Computer Architecture: A Quantitative Approach, 4th Edition

Last Updated 6/16/2009 11:46:36 AM


Authors: John L. Hennessy and David A. Patterson
Publisher: Elsevier Digital Press
ISBN: 978-0-12-370490-0
Published: 2007
Table of Contents
Chapter 1: Fundamentals of Computer Design See next page for excerpt
Chapter 2: Instruction-Level Parallelism and Its Exploitation
Chapter 3: Limits on Instruction-Level Parallelism
Chapter 4: Multiprocessors and Thread-Level Parallelism
Chapter 5: Memory Hierarchy Design
Chapter 6: Storage Systems
Appendix A: Pipelining: Basic and Intermediate Concepts
Appendix B: Too Cool for E-Mail
Appendix C: Review of Memory Hierarchy
Companion CD Appendices
Appendix D: Embedded Systems
Appendix E: Interconnection Networks
Appendix F: Vector Processors
Appendix G: Hardware and Software for VLIW and EPIC
Appendix H: Large-Scale Multiprocessors and Scientific Applications
Appendix I: Computer Arithmetic
Appendix J: Survey of Instruction Set Architectures
Appendix K: Historical Perspectives and References
Online Appendix
Appendix L: Solutions to Case Study Exercises

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